The present disclosure relates to test apparatuses, and, more particularly to a semiconductor device test apparatus and a method of testing a semiconductor device using the same.
In general, after being manufactured semiconductor devices are functionally tested using semiconductor device test apparatuses. Typical semiconductor device test apparatuses are very expensive and can be categorized into analog device test apparatuses, digital device test apparatuses, and mixed signal device test apparatuses. Digital device test apparatuses can be categorized into memory device test apparatuses and logic device test apparatuses.
FIG. 1 is a block diagram illustrating a conventional semiconductor device test apparatus 10.
Referring to FIG. 1, the conventional semiconductor device test apparatus 10 includes an automatic test equipment (ATE) unit 12, and test unit 16 on which a semiconductor device 14 (i.e., the device under test (DUT)) is disposed. The ATE unit 12 writes (inputs) a test signal 18 having a predetermined frequency to the semiconductor device 14 of the test unit 16 and reads test result signals 20 of the predetermined frequency output by the semiconductor device 14 of the test unit 16, thereby determining whether the semiconductor device 14 is a failure or not.
However, since the typical semiconductor device test apparatus as illustrated in FIG. 1 simply determines whether a semiconductor device of a test unit is a failure (good) or not, it becomes difficult to identify a specific bit failure in the semiconductor device of the test unit. In addition, with performance improvements of microprocessors, the driving speed of semiconductor devices, such as semiconductor memory devices, has increased. That is, the driving frequency of semiconductor devices has increased from 200 MHz to 400 MHz and 800 Hz. Accordingly, convention semiconductor device test apparatuses having low driving speeds cannot be used to test semiconductor devices having such high driving speeds.